Key features

• •Medium-speed operation… 8 MHz (typ.) @ CL = 50 pF and VDD–VSS = 10 V, Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times, Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• •"Preset Enable" and individual "Jam" inputs provided, Binary or decade up/down counting, 5-V, 10-V, and 15-V parametric ratings
• •BCD outputs in decade mode, 100% tested for quiescent current at 20 V, Standardized, symmetrical output characteristics, Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
• •Noise margin (full package-temperature range) = 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V
• •Applications: Programmable binary and decade counting/frequency synthesizers-BCD output Analog to digital and digital to analog conversion Up/Down binary counting Magnitude and sign generation Up/Down decade counting Difference counting